1. Field of the Invention
The present invention relates to a first-in-first-out (FIFO) device for a graphic drawing engine, and more particularly, to a FIFO device for a graphic drawing engine used in a computer for preventing loss of graphic data.
2. Description of the Related Art
In a computer, a place for temporarily storing data, i.e., a register, is necessary. In order to store data in and retrieve data from the register, the first-in-first-out (FIFO) method or a first-in-last-out (FILO) method is used. In the FIFO method, the first stored data is withdrawn first while in the FILO method, the first stored data is withdrawn last. The FIFO method can be used for transmission of the graphic data.
FIG. 1 is a block diagram of a conventional FIFO device for a graphic drawing engine. The FIFO device includes only one register 11 for storing data which is output during the application of a clock (CK) signal and a write enable (WEN) signal.
FIG. 2 is a block diagram of a conventional graphic drawing engine using the FIFO device of FIG. 1. The graphic drawing engine includes a drawing engine portion 21 and a pipeline 23 for temporarily storing data transmitted from the drawing engine portion 21. A FIFO device 31 temporarily stores the data received from the pipeline 23. A drawing engine controller 33 receives a FIFO-full signal from the FIFO device 31 and controls the output of data stored in the pipeline 23. The pipeline 23 includes N data processing devices, with, for example, three data process devices 25, 27 and 29 being shown in FIG. 2.
Referring to FIG. 2, when the FIFO device 31 is not full of data, the FIFO-full signal is disabled and the WEN signal of the drawing engine controller 33 is enabled. The graphic data transmitted from the drawing engine portion 21 is stored in the pipeline 23, and the stored data is transferred to the FIFO device 31 according to the CK signal and the WEN signal input thereto.
When the FIFO device 31 is full of data, the FIFO-full signal is enabled, and the drawing engine portion 33 disables the respective WEN signals connected to registers 25, 27 and 29 in the pipeline 23. The operation of the pipeline 23 is terminated, and no data is transmitted to the FIFO device 31.
In the conventional FIFO device for a graphic drawing engine, when the FIFO device is full of data, during the time when graphic data is stored in the FIFO device, and when a FIFO-full signal is enabled, the data stored in the pipeline is continuously transmitted to the FIFO device, to thereby overlap with the data which has already been stored. Thus, part of the data may be lost.